EDN

Analog Devices ADCLK954 and ADCLK854: Clock buffers have 75- and 100-fsec jitter

The 12-channel ADCLK954 LVPECL and the ADCLK854 LVDS/CMOS clock-fanout buffers provide 75- and 100-fsec jitter, respectively. The clock buffers have a 9-psec skew, suiting use in high-speed ADCs and ...
Electronic Design

Fast Clock Buffers Boast Very Low Jitter, Skew

The ADCLK9xx family of compact clock buffers aim at high-speed applications requiring low jitter. The 12-channel ADCLK954 LVPECL and ADCLK854 LVDS/CMOS and the 6-channel ADCLK946 LVPECL and ADCLK846 ...
Seeking Alpha

Skyworks Sets New Benchmark in Ultra-Low Jitter Clock Buffers for High-Speed Connectivity

New SKY53510/80/40 Family of Clock Fanout Buffers are Purpose-Built for Data Centers, Wireless Networks, and PCIe Gen 7 Applications IRVINE, Calif.--(BUSINESS WIRE)-- Skyworks Solutions, Inc. (SWKS), ...
EDN

CMOS Clock Module

Occasionally you might need a simple clock module for various projects. A small CMOS clock module, such as the one presented here, is not capable of offering as much precision as a clock module built ...
Business Wire

IDT Introduces Ultra-Low-Jitter Family of LVCMOS Clock Buffers

SAN JOSE, Calif.--(BUSINESS WIRE)--Integrated Device Technology, Inc. (IDT®) (NASDAQ:IDTI) introduced today a new family of clock buffers that deliver best-in-class jitter performance in a compact ...
Electronic Design

Understand, Measure, And Optimize Clock Distribution Additive Jitter To Achieve Best Performance

High-speed communications require system designers to optimize clocking performance while adhering to both performance and cost-budget requirements. When selecting an optimal clock, the developer must ...
Nature

Power Supply Noise and Induced Jitter Analysis in Integrated Circuits

Modern integrated circuits are increasingly vulnerable to power supply noise and the ensuing induced jitter, phenomena that can significantly impair circuit reliability and performance. The interplay ...