Jitter measurements are becoming increasingly important in the characterization and qualification of high-speed computing and communication systems. This is especially true with the recent ...

In the previous installment in this series on the history of jitter, we'd reached the cusp of the new millennium. The in-vogue methodology for jitter analysis of the day was using edge crossing-point ...

This white paper is aimed at system architects and physical implementation leaders working on the design of SoCs. It can be confusing to understand the impact of different jitter sources and how to ...

Volumes have been written about jitter, an indication of the complexity associated with timing uncertainty. Actually, timing errors are easy to measure. It is in the assignment of blame that the ...

With the continued quest for ever-higher performance, the unit interval (UI) for a data valid window continues to shrink. At a 1-Gbit/s rate, the UI is 1000 ps, shrinking to 200 ps at 5 Gbits/s and a ...

Jitter can seriously degrade system operation but, as Lee Morgan explains, characterising and troubleshooting jitter on embedded systems has become a lot easier. Clocks are the heartbeats of embedded ...

A PLL (phase-locked loop) is perhaps the most widely used analog circuit in SOCs (system-on-a-chip). Almost all SOCs with a clock rate over 30MHz use a PLL for frequency synthesis. Most SOCs use more ...

VoIP jitter, usually referred to as network jitter, is the time delay experienced by VoIP phone users between signal transmission and signal reception over a data network. During VoIP voice and video ...

Satellite jitter, defined as unintended and rapid oscillations in a satellite’s orientation, remains a critical challenge for remote sensing applications that demand high geometric and radiometric ...